From 2dc4da71e4570765b02a4c76dfcacfbc06bd3b46 Mon Sep 17 00:00:00 2001
From: Riyyi <riyyi3@gmail.com>
Date: Mon, 22 Aug 2022 22:48:57 +0200
Subject: [PATCH] Emulator: Add mnemonic comments to opcodes

---
 src/cpu.cpp | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/src/cpu.cpp b/src/cpu.cpp
index 7ded1f9..fae1d35 100644
--- a/src/cpu.cpp
+++ b/src/cpu.cpp
@@ -143,7 +143,7 @@ void CPU::ld8()
 		// LD (HL-),A == LD (HLD),A == LDD (HL),A
 		m_wait_cycles += 8;
 
-		// Put A into memory address in hl
+		// Put A into memory address in HL
 		uint32_t address = hl();
 		write(address, m_a);
 
@@ -196,30 +196,42 @@ void CPU::ld16()
 		break;
 	}
 	case 0x08: {
+		// LD (nn),SP
 		m_wait_cycles += 20;
+
+		// Put value of SP into address given by next 2 bytes in memory
 		// TODO
 		break;
 	}
 	case 0x11:
+		// LD DE,nn
 		m_wait_cycles += 12;
 		write(de(), pcRead16());
 		break;
 	case 0x21:
+		// LD HL,nn
 		m_wait_cycles += 12;
 		write(hl(), pcRead16());
 		break;
 	case 0x31: {
+		// LD SP,nn
 		m_wait_cycles += 12;
 		m_sp = pcRead16();
 		break;
 	}
 	case 0xf8: {
+		// LD HL,SP + e8 == LDHL SP,e8
 		m_wait_cycles += 12;
+
+		// Put SP + next (signed) byte in memory into HL
 		// TODO
+
+		// Unsets ZF and NF, may enable HF and CF
 		// TODO flags
 		break;
 	}
 	case 0xf9: {
+		// LD SP,HL
 		m_wait_cycles += 8;
 		m_sp = hl();
 		break;
@@ -234,6 +246,7 @@ void CPU::jp16()
 	uint8_t opcode = pcRead();
 	switch (opcode) {
 	case 0xc3:
+		// JP nn
 		m_wait_cycles += 16;
 		m_pc = pcRead16();
 		break;