Emulator: Fix SLA/SRA/SRL opcodes: 0x26, 0x2e, 0x3e
This commit is contained in:
+13
-13
@@ -369,7 +369,7 @@ void CPU::swap()
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register_ = (register_ >> 4) | (register_ << 4);
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register_ = (register_ >> 4) | (register_ << 4);
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// Set flags
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// Set flags
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m_zf = register_ == 0;
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m_zf = (register_ == 0);
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m_nf = 0;
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m_nf = 0;
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m_hf = 0;
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m_hf = 0;
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m_cf = 0;
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m_cf = 0;
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@@ -412,7 +412,7 @@ void CPU::rl()
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register_ = (old_carry | (register_ << 1)) & 0xff;
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register_ = (old_carry | (register_ << 1)) & 0xff;
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// Set other flags
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// Set other flags
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m_zf = register_ == 0;
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m_zf = (register_ == 0);
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m_nf = 0;
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m_nf = 0;
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m_hf = 0;
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m_hf = 0;
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};
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};
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@@ -452,7 +452,7 @@ void CPU::rlc()
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register_ = ((register_ >> 7) | (register_ << 1)) & 0xff;
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register_ = ((register_ >> 7) | (register_ << 1)) & 0xff;
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// Set other flags
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// Set other flags
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m_zf = register_ == 0;
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m_zf = (register_ == 0);
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m_nf = 0;
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m_nf = 0;
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m_hf = 0;
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m_hf = 0;
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};
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};
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@@ -488,13 +488,13 @@ void CPU::rr()
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// Copy bit 0 into carry flag
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// Copy bit 0 into carry flag
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uint32_t old_carry = m_cf != 0;
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uint32_t old_carry = m_cf != 0;
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m_cf = (register_ & 0x01) == 0x01;
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m_cf = (register_ & 0x1) == 0x1;
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// Rotate register r8 right through carry
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// Rotate register r8 right through carry
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register_ = ((register_ >> 1) | (old_carry << 7)) & 0xff;
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register_ = ((register_ >> 1) | (old_carry << 7)) & 0xff;
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// Set other flags
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// Set other flags
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m_zf = register_ == 0;
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m_zf = (register_ == 0);
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m_nf = 0;
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m_nf = 0;
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m_hf = 0;
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m_hf = 0;
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};
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};
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@@ -534,7 +534,7 @@ void CPU::rrc()
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register_ = ((register_ >> 1) | (register_ << 7)) & 0xff;
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register_ = ((register_ >> 1) | (register_ << 7)) & 0xff;
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// Set other flags
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// Set other flags
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m_zf = register_ == 0;
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m_zf = (register_ == 0);
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m_nf = 0;
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m_nf = 0;
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m_hf = 0;
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m_hf = 0;
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};
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};
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@@ -575,13 +575,13 @@ void CPU::sla()
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// r8
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// r8
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// Copy bit 7 into carry flag
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// Copy bit 7 into carry flag
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m_cf = (m_a & 0x80) == 0x80;
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m_cf = (register_ & 0x80) == 0x80;
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// Shift Left Arithmetically register r8
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// Shift Left Arithmetically register r8
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register_ = (register_ << 1) & 0xff;
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register_ = (register_ << 1) & 0xff;
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// Set other flags
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// Set other flags
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m_zf = register_ == 0;
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m_zf = (register_ == 0);
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m_nf = 0;
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m_nf = 0;
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m_hf = 0;
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m_hf = 0;
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};
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};
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@@ -623,13 +623,13 @@ void CPU::sra()
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// └──┘
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// └──┘
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// Copy bit 0 into carry flag
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// Copy bit 0 into carry flag
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m_cf = (m_a & 0x01) == 0x01;
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m_cf = (register_ & 0x1) == 0x1;
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// Shift Right Arithmatically register r8
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// Shift Right Arithmatically register r8
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register_ = (register_ >> 1) | (register_ & 0x80); // Note: bit 7 remains
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register_ = (register_ >> 1) | (register_ & 0x80); // Note: bit 7 remains
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// Set other flags
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// Set other flags
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m_zf = register_ == 0;
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m_zf = (register_ == 0);
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m_nf = 0;
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m_nf = 0;
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m_hf = 0;
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m_hf = 0;
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};
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};
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@@ -670,13 +670,13 @@ void CPU::srl()
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// r8
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// r8
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// Copy bit 0 into carry flag
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// Copy bit 0 into carry flag
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m_cf = (m_a & 0x01) == 0x01;
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m_cf = (register_ & 0x1) == 0x1;
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// Shift Right Locically register r8
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// Shift Right Locically register r8
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register_ = (register_ >> 1) & 0x7f; // Note: bit 7 is set to 0
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register_ = (register_ >> 1) & 0x7f; // Note: bit 7 is set to 0
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// Set other flags
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// Set other flags
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m_zf = register_ == 0;
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m_zf = (register_ == 0);
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m_nf = 0;
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m_nf = 0;
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m_hf = 0;
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m_hf = 0;
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};
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};
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@@ -692,7 +692,7 @@ void CPU::srl()
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case 0x3e: /* SRL (HL) */ {
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case 0x3e: /* SRL (HL) */ {
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m_wait_cycles += 8; // + 8 = 16 total
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m_wait_cycles += 8; // + 8 = 16 total
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// Rotate the byte pointed to by HL right
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// Shift right logically the byte pointed to by HL
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uint32_t data = read(hl());
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uint32_t data = read(hl());
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shift_right_logically(data);
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shift_right_logically(data);
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write(hl(), data);
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write(hl(), data);
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