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@ -291,9 +291,9 @@ void CPU::update() |
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case 0xdc: call(); break; |
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case 0xdc: call(); break; |
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case 0xde: sbc8(); break; |
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case 0xde: sbc8(); break; |
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case 0xdf: rst(); break; |
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case 0xdf: rst(); break; |
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case 0xe0: ldffi8(); break; |
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case 0xe0: ldff8(); break; |
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case 0xe1: pop(); break; |
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case 0xe1: pop(); break; |
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case 0xe2: ldr8(); break; |
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case 0xe2: ldff8(); break; |
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case 0xe5: push(); break; |
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case 0xe5: push(); break; |
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case 0xe6: and8(); break; |
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case 0xe6: and8(); break; |
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case 0xe7: rst(); break; |
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case 0xe7: rst(); break; |
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@ -302,9 +302,9 @@ void CPU::update() |
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case 0xea: ldr8(); break; |
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case 0xea: ldr8(); break; |
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case 0xee: xor8(); break; |
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case 0xee: xor8(); break; |
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case 0xef: rst(); break; |
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case 0xef: rst(); break; |
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case 0xf0: ldffi8(); break; |
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case 0xf0: ldff8(); break; |
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case 0xf1: pop(); break; |
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case 0xf1: pop(); break; |
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case 0xf2: lda8(); break; |
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case 0xf2: ldff8(); break; |
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case 0xf5: push(); break; |
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case 0xf5: push(); break; |
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case 0xf6: or8(); break; |
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case 0xf6: or8(); break; |
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case 0xf7: rst(); break; |
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case 0xf7: rst(); break; |
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@ -872,12 +872,6 @@ void CPU::lda8() |
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m_h = address >> 8; |
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m_h = address >> 8; |
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break; |
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break; |
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} |
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} |
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case 0xf2: // LD A,(0xff00 + C) == LD A,(C) == LDH A,(C) == LDIO A,(C)
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m_wait_cycles += 8; |
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// Load value into register A from the byte at address 0xff00 + C
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m_a = ffRead(m_c); |
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break; |
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case 0xfa: // LD A,a16
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case 0xfa: // LD A,a16
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m_wait_cycles += 16; |
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m_wait_cycles += 16; |
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@ -1164,13 +1158,6 @@ void CPU::ldr8() |
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break; |
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break; |
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} |
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} |
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case 0x7f: /* LD A,A m_a = m_a; */ break; |
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case 0x7f: /* LD A,A m_a = m_a; */ break; |
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case 0xe2: /* LD (0xff00 + C),A == LD (C),A == LDH (C),A == LDIO (C),A */ { |
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m_wait_cycles += 4; // + 4 = 8 total
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// Store value in register A into the byte at address 0xff00 + C
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ffWrite(m_c, m_a); |
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break; |
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} |
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case 0xea: /* LD a16,A */ { |
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case 0xea: /* LD a16,A */ { |
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m_wait_cycles += 12; // + 4 = 16 total
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m_wait_cycles += 12; // + 4 = 16 total
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@ -1270,22 +1257,34 @@ void CPU::ra() |
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m_hf = 0; |
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m_hf = 0; |
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} |
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} |
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void CPU::ldffi8() |
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void CPU::ldff8() |
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{ |
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{ |
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uint8_t opcode = pcRead(); |
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uint8_t opcode = pcRead(); |
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switch (opcode) { |
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switch (opcode) { |
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case 0xe0: // LD (0xff00 + i8),A == LDH (io8),A
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case 0xe0: // LD (0xff00 + s8),A == LDH (io8),A
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m_wait_cycles += 12; |
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m_wait_cycles += 12; |
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// Put value in A into address (0xff00 + next byte in memory)
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// Put value in A into address (0xff00 + next byte in memory)
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ffWrite(pcRead(), m_a); |
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ffWrite(pcRead(), m_a); |
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break; |
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break; |
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case 0xf0: // LD A,(0xff00 + i8) == LDH A,(io8)
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case 0xe2: // LD (0xff00 + C),A == LDH (C),A
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m_wait_cycles += 8; |
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// Store value in register A into the byte at address 0xff00 + C
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ffWrite(m_c, m_a); |
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break; |
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case 0xf0: // LD A,(0xff00 + s8) == LDH A,(io8)
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m_wait_cycles += 12; |
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m_wait_cycles += 12; |
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// Put value at address (0xff00 + next byte in memory) into A
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// Put value at address (0xff00 + next byte in memory) into A
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m_a = ffRead(pcRead()); |
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m_a = ffRead(pcRead()); |
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break; |
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break; |
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case 0xf2: // LD A,(0xff00 + C) == LDH A,(C)
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m_wait_cycles += 8; |
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// Load value into register A from the byte at address 0xff00 + C
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m_a = ffRead(m_c); |
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break; |
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default: |
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default: |
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VERIFY_NOT_REACHED(); |
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VERIFY_NOT_REACHED(); |
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} |
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} |
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