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@ -58,7 +58,9 @@ void CPU::update()
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if (m_wait_cycles <= 0) { |
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// Read next opcode
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uint8_t opcode = peekMemory(); |
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print("running opcode: {:#x}\n", opcode); |
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switch (opcode) { |
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case 0x01: ld16(); break; |
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case 0x08: ld16(); break; |
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case 0x11: ld16(); break; |
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@ -71,13 +73,12 @@ void CPU::update()
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case 0xf0: ldh8(); break; |
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case 0xf8: ld16(); break; |
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case 0xf9: ld16(); break; |
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default: |
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print("opcode {:#x} not implemented", opcode); |
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print("opcode {:#x} not implemented\n", opcode); |
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VERIFY_NOT_REACHED(); |
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} |
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} |
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// print("This is an update from the CPU\n");
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} |
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void CPU::add() |
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@ -99,7 +100,7 @@ void CPU::add()
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m_a += immediate; |
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// Drop overflown bits, the 'A' register is 8-bit
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m_a &= 0xff; |
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m_a &= 0x00ff; |
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break; |
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default: |
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VERIFY_NOT_REACHED(); |
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@ -111,8 +112,9 @@ void CPU::ld8()
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uint8_t opcode = read(m_pc++); |
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switch (opcode) { |
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case 0x3e: |
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// LD A,n
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m_wait_cycles += 8; |
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m_a = immediate8(); |
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m_a = read(m_pc++); |
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break; |
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default: |
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VERIFY_NOT_REACHED(); |
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@ -125,15 +127,17 @@ void CPU::ldh8()
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switch (opcode) { |
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case 0xe0: |
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// LD ($ff00 + n),A == LDH (n),A
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// Put value in A into address (0xff00 + next byte in memory):
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m_wait_cycles += 12; |
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// Put value in A into address (0xff00 + next byte in memory)
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writeFf(m_a); |
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break; |
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case 0xf0: |
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// LD A,($ff00 + n) == LDH A,(n)
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// Put value at address (0xff00 + next byte in memory) into A:
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m_wait_cycles += 12; |
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m_a = readFf(immediate8()); |
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// Put value at address (0xff00 + next byte in memory) into A
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m_a = readFf(read(m_pc++)); |
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break; |
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default: |
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VERIFY_NOT_REACHED(); |
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@ -149,6 +153,11 @@ void CPU::ld16()
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write(bc(), immediate16()); |
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break; |
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} |
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case 0x08: { |
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m_wait_cycles += 20; |
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// TODO
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break; |
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} |
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case 0x11: |
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m_wait_cycles += 12; |
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write(de(), immediate16()); |
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@ -162,11 +171,6 @@ void CPU::ld16()
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m_sp = immediate16(); |
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break; |
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} |
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case 0x08: { |
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m_wait_cycles += 20; |
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// TODO
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break; |
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} |
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case 0xf8: { |
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m_wait_cycles += 12; |
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// TODO
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