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@ -192,6 +192,14 @@ void CPU::update()
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case 0x7d: ldr8(); break; |
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case 0x7e: ldr8(); break; |
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case 0x7f: ldr8(); break; |
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case 0x80: add8(); break; |
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case 0x81: add8(); break; |
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case 0x82: add8(); break; |
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case 0x83: add8(); break; |
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case 0x84: add8(); break; |
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case 0x85: add8(); break; |
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case 0x86: add8(); break; |
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case 0x87: add8(); break; |
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case 0xa0: and8(); break; |
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case 0xa1: and8(); break; |
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case 0xa2: and8(); break; |
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@ -214,7 +222,7 @@ void CPU::update()
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case 0xc3: jp16(); break; |
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case 0xc4: call(); break; |
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case 0xc5: push(); break; |
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case 0xc6: addi8(); break; |
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case 0xc6: add8(); break; |
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case 0xc7: rst(); break; |
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case 0xcb: prefix(); break; |
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case 0xcc: call(); break; |
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@ -269,25 +277,45 @@ void CPU::update()
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// -------------------------------------
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void CPU::addi8() |
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void CPU::add8() |
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{ |
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uint8_t opcode = pcRead(); |
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uint8_t immediate = pcRead(); |
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switch (opcode) { |
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case 0xc6: // ADD A,i8, flags: Z 0 H C
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m_wait_cycles += 8; |
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auto add = [this](uint8_t register_) -> void { |
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// ADD A,r8, flags: Z 0 H C
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m_wait_cycles += 4; |
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// Set flags
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m_nf = 0; |
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m_hf = isCarry(m_a, immediate, 0x10); |
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m_cf = isCarry(m_a, immediate, 0x100); |
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m_hf = isCarry(m_a, register_, 0x10); |
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m_cf = isCarry(m_a, register_, 0x100); |
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// A = A + r
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m_a = (m_a + immediate) & 0xff; |
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// Add the value in r8 to A
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m_a = (m_a + register_) & 0xff; |
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// Zero flag
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m_zf = m_a == 0; |
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}; |
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uint8_t opcode = pcRead(); |
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switch (opcode) { |
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case 0x80: /* ADD A,B */ add(m_b); break; |
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case 0x81: /* ADD A,C */ add(m_c); break; |
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case 0x82: /* ADD A,D */ add(m_d); break; |
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case 0x83: /* ADD A,E */ add(m_e); break; |
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case 0x84: /* ADD A,H */ add(m_h); break; |
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case 0x85: /* ADD A,L */ add(m_l); break; |
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case 0x86: /* ADD A,(HL) */ { |
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m_wait_cycles += 4; // + 4 = 8 total
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add(read(hl())); |
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break; |
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} |
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case 0x87: /* ADD A,A */ add(m_a); break; |
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case 0xc6: /* ADD A,i8 */ { |
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m_wait_cycles += 4; // + 4 = 8 total
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add(pcRead()); |
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break; |
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} |
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default: |
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VERIFY_NOT_REACHED(); |
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} |
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