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@ -23,6 +23,9 @@ void CPU::prefix()
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if (opcode >= 0x40 && opcode <= 0x7f) { |
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bit(); |
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} |
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else if (opcode >= 0x80 && opcode <= 0xbf) { |
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res(); |
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} |
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else { |
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print("opcode {:#04x} not implemented\n", opcode); |
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print("immediate: {:#04x}\n", m_pc, pcRead()); |
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@ -131,3 +134,101 @@ void CPU::bit()
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VERIFY_NOT_REACHED(); |
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} |
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} |
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void CPU::res() |
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{ |
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auto reset_bit = [this](uint32_t bit, uint32_t& register_) -> void { |
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// RES b,r8
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m_wait_cycles += 8; |
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// Reset bit at position 'x' in register r8
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register_ = register_ & (~bit); |
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}; |
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auto reset_bit_hl = [this](uint32_t bit) -> void { |
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// RES b,(HL)
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m_wait_cycles += 16; |
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// Set bit at postition 'x' in the byte pointed by HL to 0
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uint32_t data = read(hl()); |
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data = data & (~bit); |
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write(hl(), data); |
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}; |
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uint8_t opcode = pcRead(); |
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switch (opcode) { |
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case 0x40: /* RES 0,B */ reset_bit(0x01, m_b); break; |
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case 0x41: /* RES 0,C */ reset_bit(0x01, m_c); break; |
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case 0x42: /* RES 0,D */ reset_bit(0x01, m_d); break; |
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case 0x43: /* RES 0,E */ reset_bit(0x01, m_e); break; |
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case 0x44: /* RES 0,H */ reset_bit(0x01, m_h); break; |
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case 0x45: /* RES 0,L */ reset_bit(0x01, m_l); break; |
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case 0x46: /* RES 0,(HL) */ reset_bit_hl(0x01); break; |
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case 0x47: /* RES 0,A */ reset_bit(0x01, m_a); break; |
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case 0x48: /* RES 1,B */ reset_bit(0x02, m_b); break; |
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case 0x49: /* RES 1,C */ reset_bit(0x02, m_c); break; |
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case 0x4a: /* RES 1,D */ reset_bit(0x02, m_d); break; |
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case 0x4b: /* RES 1,E */ reset_bit(0x02, m_e); break; |
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case 0x4c: /* RES 1,H */ reset_bit(0x02, m_h); break; |
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case 0x4d: /* RES 1,L */ reset_bit(0x02, m_l); break; |
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case 0x4e: /* RES 1,(HL) */ reset_bit_hl(0x02); break; |
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case 0x4f: /* RES 1,A */ reset_bit(0x02, m_a); break; |
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case 0x50: /* RES 2,B */ reset_bit(0x04, m_b); break; |
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case 0x51: /* RES 2,C */ reset_bit(0x04, m_c); break; |
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case 0x52: /* RES 2,D */ reset_bit(0x04, m_d); break; |
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case 0x53: /* RES 2,E */ reset_bit(0x04, m_e); break; |
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case 0x54: /* RES 2,H */ reset_bit(0x04, m_h); break; |
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case 0x55: /* RES 2,L */ reset_bit(0x04, m_l); break; |
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case 0x56: /* RES 2,(HL) */ reset_bit_hl(0x04); break; |
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case 0x57: /* RES 2,A */ reset_bit(0x04, m_a); break; |
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case 0x58: /* RES 3,B */ reset_bit(0x08, m_b); break; |
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case 0x59: /* RES 3,C */ reset_bit(0x08, m_c); break; |
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case 0x5a: /* RES 3,D */ reset_bit(0x08, m_d); break; |
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case 0x5b: /* RES 3,E */ reset_bit(0x08, m_e); break; |
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case 0x5c: /* RES 3,H */ reset_bit(0x08, m_h); break; |
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case 0x5d: /* RES 3,L */ reset_bit(0x08, m_l); break; |
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case 0x5e: /* RES 3,(HL) */ reset_bit_hl(0x08); break; |
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case 0x5f: /* RES 3,A */ reset_bit(0x08, m_a); break; |
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case 0x60: /* RES 4,B */ reset_bit(0x10, m_b); break; |
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case 0x61: /* RES 4,C */ reset_bit(0x10, m_c); break; |
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case 0x62: /* RES 4,D */ reset_bit(0x10, m_d); break; |
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case 0x63: /* RES 4,E */ reset_bit(0x10, m_e); break; |
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case 0x64: /* RES 4,H */ reset_bit(0x10, m_h); break; |
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case 0x65: /* RES 4,L */ reset_bit(0x10, m_l); break; |
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case 0x66: /* RES 4,(HL) */ reset_bit_hl(0x10); break; |
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case 0x67: /* RES 4,A */ reset_bit(0x10, m_a); break; |
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case 0x68: /* RES 5,B */ reset_bit(0x20, m_b); break; |
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case 0x69: /* RES 5,C */ reset_bit(0x20, m_c); break; |
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case 0x6a: /* RES 5,D */ reset_bit(0x20, m_d); break; |
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case 0x6b: /* RES 5,E */ reset_bit(0x20, m_e); break; |
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case 0x6c: /* RES 5,H */ reset_bit(0x20, m_h); break; |
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case 0x6d: /* RES 5,L */ reset_bit(0x20, m_l); break; |
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case 0x6e: /* RES 5,(HL) */ reset_bit_hl(0x20); break; |
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case 0x6f: /* RES 5,A */ reset_bit(0x20, m_a); break; |
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case 0x70: /* RES 6,B */ reset_bit(0x40, m_b); break; |
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case 0x71: /* RES 6,C */ reset_bit(0x40, m_c); break; |
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case 0x72: /* RES 6,D */ reset_bit(0x40, m_d); break; |
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case 0x73: /* RES 6,E */ reset_bit(0x40, m_e); break; |
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case 0x74: /* RES 6,H */ reset_bit(0x40, m_h); break; |
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case 0x75: /* RES 6,L */ reset_bit(0x40, m_l); break; |
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case 0x76: /* RES 6,(HL) */ reset_bit_hl(0x40); break; |
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case 0x77: /* RES 6,A */ reset_bit(0x40, m_a); break; |
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case 0x78: /* RES 7,B */ reset_bit(0x80, m_b); break; |
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case 0x79: /* RES 7,C */ reset_bit(0x80, m_c); break; |
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case 0x7a: /* RES 7,D */ reset_bit(0x80, m_d); break; |
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case 0x7b: /* RES 7,E */ reset_bit(0x80, m_e); break; |
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case 0x7c: /* RES 7,H */ reset_bit(0x80, m_h); break; |
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case 0x7d: /* RES 7,L */ reset_bit(0x80, m_l); break; |
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case 0x7e: /* RES 7,(HL) */ reset_bit_hl(0x80); break; |
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case 0x7f: /* RES 7,A */ reset_bit(0x80, m_a); break; |
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default: |
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VERIFY_NOT_REACHED(); |
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} |
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} |
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Riyyi
2 years ago