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@ -929,24 +929,28 @@ void CPU::ldr8() |
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{ |
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{ |
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uint8_t opcode = pcRead(); |
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uint8_t opcode = pcRead(); |
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switch (opcode) { |
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switch (opcode) { |
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case 0x02: // LD (BC),A
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case 0x02: /* LD (BC),A */ { |
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m_wait_cycles += 4; |
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m_wait_cycles += 4; // + 4 = 8 total
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write(bc(), m_a); |
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write(bc(), m_a); |
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break; |
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break; |
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case 0x0a: // LD A,(BC)
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} |
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m_wait_cycles += 4; |
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case 0x0a: /* LD A,(BC) */ { |
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m_wait_cycles += 4; // + 4 = 8 total
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m_a = read(bc()); |
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m_a = read(bc()); |
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break; |
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break; |
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case 0x12: // LD (DE),A
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} |
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m_wait_cycles += 4; |
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case 0x12: /* LD (DE),A */ { |
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m_wait_cycles += 4; // + 4 = 8 total
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write(de(), m_a); |
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write(de(), m_a); |
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break; |
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break; |
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case 0x1a: // LD A,(DE)
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} |
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m_wait_cycles += 4; |
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case 0x1a: /* LD A,(DE) */ { |
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m_wait_cycles += 4; // + 4 = 8 total
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m_a = read(de()); |
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m_a = read(de()); |
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break; |
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break; |
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case 0x22: { // LD (HL+),A == LD (HLI),A == LDI (HL),A
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} |
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m_wait_cycles += 4; |
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case 0x22: /* LD (HL+),A == LD (HLI),A == LDI (HL),A */ { |
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m_wait_cycles += 4; // + 4 = 8 total
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// Put A into memory address in HL
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// Put A into memory address in HL
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uint32_t address = hl(); |
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uint32_t address = hl(); |
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@ -958,8 +962,8 @@ void CPU::ldr8() |
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m_h = address >> 8; |
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m_h = address >> 8; |
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break; |
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break; |
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} |
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} |
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case 0x32: { // LD (HL-),A == LD (HLD),A == LDD (HL),A
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case 0x32: /* LD (HL-),A == LD (HLD),A == LDD (HL),A */ { |
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m_wait_cycles += 4; |
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m_wait_cycles += 4; // + 4 = 8 total
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// Put A into memory address in HL
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// Put A into memory address in HL
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uint32_t address = hl(); |
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uint32_t address = hl(); |
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