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@ -124,7 +124,7 @@ void CPU::update() |
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case 0x37: misc(); break; |
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case 0x37: misc(); break; |
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case 0x38: jrs8(); break; |
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case 0x38: jrs8(); break; |
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case 0x39: addr16(); break; |
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case 0x39: addr16(); break; |
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case 0x3a: ldr8(); break; |
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case 0x3a: lda8(); break; |
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case 0x3b: dec16(); break; |
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case 0x3b: dec16(); break; |
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case 0x3c: inc8(); break; |
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case 0x3c: inc8(); break; |
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case 0x3d: dec8(); break; |
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case 0x3d: dec8(); break; |
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@ -843,7 +843,7 @@ void CPU::lda8() |
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case 0x2a: { // LD A,(HL+) == LD A,(HLI) == LDI A,(HL)
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case 0x2a: { // LD A,(HL+) == LD A,(HLI) == LDI A,(HL)
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m_wait_cycles += 8; |
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m_wait_cycles += 8; |
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// Put value at address in HL into A
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// Load value into register A from the byte pointed by HL
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uint32_t address = hl(); |
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uint32_t address = hl(); |
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m_a = read(address); |
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m_a = read(address); |
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@ -856,7 +856,7 @@ void CPU::lda8() |
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case 0x3a: { // LD A,(HL-) == LD A,(HLD) == LDD A,(HL)
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case 0x3a: { // LD A,(HL-) == LD A,(HLD) == LDD A,(HL)
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m_wait_cycles += 8; |
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m_wait_cycles += 8; |
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// Put value at address in HL into A
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// Load value into register A from the byte pointed by HL
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uint32_t address = hl(); |
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uint32_t address = hl(); |
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m_a = read(address); |
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m_a = read(address); |
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@ -953,7 +953,7 @@ void CPU::inc16() |
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case 0x03: /* INC BC */ setBC(bc() + 1); break; |
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case 0x03: /* INC BC */ setBC(bc() + 1); break; |
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case 0x13: /* INC DE */ setDE(de() + 1); break; |
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case 0x13: /* INC DE */ setDE(de() + 1); break; |
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case 0x23: /* INC HL */ setHL(hl() + 1); break; |
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case 0x23: /* INC HL */ setHL(hl() + 1); break; |
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case 0x24: /* INC SP */ m_sp = (m_sp + 1) & 0xffff; break; |
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case 0x33: /* INC SP */ m_sp = (m_sp + 1) & 0xffff; break; |
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default: |
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default: |
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VERIFY_NOT_REACHED(); |
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VERIFY_NOT_REACHED(); |
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} |
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} |
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