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@ -70,7 +70,7 @@ void CPU::update() |
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case 0x01: ldi16(); break; |
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case 0x01: ldi16(); break; |
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case 0x02: ldr8(); break; |
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case 0x02: ldr8(); break; |
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case 0x06: ldi8(); break; |
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case 0x06: ldi8(); break; |
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case 0x08: lda16(); break; |
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case 0x08: ldr16(); break; |
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case 0x0a: ldr8(); break; |
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case 0x0a: ldr8(); break; |
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case 0x0d: dec8(); break; |
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case 0x0d: dec8(); break; |
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case 0x0e: ldi8(); break; |
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case 0x0e: ldi8(); break; |
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@ -478,22 +478,6 @@ void CPU::ldffi8() |
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} |
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} |
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} |
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} |
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void CPU::lda16() |
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{ |
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uint8_t opcode = pcRead(); |
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switch (opcode) { |
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case 0x08: { // LD a16,SP
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m_wait_cycles += 20; |
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// Put value of SP into address given by next 2 bytes in memory
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// TODO
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break; |
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} |
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default: |
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VERIFY_NOT_REACHED(); |
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} |
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} |
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void CPU::ldi16() |
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void CPU::ldi16() |
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{ |
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{ |
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uint8_t opcode = pcRead(); |
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uint8_t opcode = pcRead(); |
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@ -525,6 +509,13 @@ void CPU::ldr16() |
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{ |
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{ |
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uint8_t opcode = pcRead(); |
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uint8_t opcode = pcRead(); |
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switch (opcode) { |
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switch (opcode) { |
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case 0x08: { // LD a16,SP
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m_wait_cycles += 20; |
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// Put value of SP into address given by next 2 bytes in memory
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write(pcRead16(), m_sp); |
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break; |
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} |
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case 0xf8: { // LD HL,SP + s8 == LDHL SP,s8, flags: 0 0 H C
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case 0xf8: { // LD HL,SP + s8 == LDHL SP,s8, flags: 0 0 H C
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m_wait_cycles += 12; |
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m_wait_cycles += 12; |
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