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@ -62,10 +62,14 @@ void CPU::update() |
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switch (opcode) { |
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switch (opcode) { |
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case 0x01: ld16(); break; |
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case 0x01: ld16(); break; |
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case 0x02: ld8(); break; |
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case 0x08: ld16(); break; |
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case 0x08: ld16(); break; |
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case 0x11: ld16(); break; |
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case 0x11: ld16(); break; |
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case 0x12: ld8(); break; |
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case 0x21: ld16(); break; |
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case 0x21: ld16(); break; |
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case 0x22: ld8(); break; |
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case 0x31: ld16(); break; |
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case 0x31: ld16(); break; |
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case 0x32: ld8(); break; |
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case 0x3e: ld8(); break; |
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case 0x3e: ld8(); break; |
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case 0xc3: jp16(); break; |
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case 0xc3: jp16(); break; |
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case 0xc6: add(); break; |
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case 0xc6: add(); break; |
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@ -111,6 +115,44 @@ void CPU::ld8() |
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{ |
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{ |
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uint8_t opcode = read(m_pc++); |
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uint8_t opcode = read(m_pc++); |
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switch (opcode) { |
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switch (opcode) { |
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case 0x02: |
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// LD (BC),A
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m_wait_cycles += 8; |
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write(bc(), m_a); |
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break; |
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case 0x12: |
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// LD (DE),A
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m_wait_cycles += 8; |
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write(de(), m_a); |
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break; |
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case 0x22: { |
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// LD (HL+),A == LD (HLI),A == LDI (HL),A
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m_wait_cycles += 8; |
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// Put A into memory address in HL
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uint32_t address = hl(); |
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write(address, m_a); |
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// Increment HL
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address = (address + 1) & 0xffff; |
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m_l = address & 0x00ff; |
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m_h = address >> 8; |
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break; |
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} |
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case 0x32: { |
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// LD (HL-),A == LD (HLD),A == LDD (HL),A
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m_wait_cycles += 8; |
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// Put A into memory address in hl
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uint32_t address = hl(); |
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write(address, m_a); |
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// Decrement HL
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address = (address - 1) & 0xffff; |
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m_l = address & 0x00ff; |
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m_h = address >> 8; |
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break; |
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} |
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case 0x3e: |
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case 0x3e: |
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// LD A,n
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// LD A,n
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m_wait_cycles += 8; |
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m_wait_cycles += 8; |
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