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@ -154,9 +154,13 @@ void CPU::update() |
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case 0xc6: add(); break; |
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case 0xc6: add(); break; |
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case 0xcd: call(); break; |
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case 0xcd: call(); break; |
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case 0xe0: ldffi8(); break; |
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case 0xe0: ldffi8(); break; |
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case 0xe2: ldr8(); break; |
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case 0xea: ldr8(); break; |
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case 0xf0: ldffi8(); break; |
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case 0xf0: ldffi8(); break; |
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case 0xf2: lda8(); break; |
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case 0xf8: ldr16(); break; |
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case 0xf8: ldr16(); break; |
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case 0xf9: ldr16(); break; |
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case 0xf9: ldr16(); break; |
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case 0xfa: lda8(); break; |
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default: |
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default: |
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print("opcode {:#x} not implemented\n", opcode); |
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print("opcode {:#x} not implemented\n", opcode); |
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@ -262,6 +266,14 @@ void CPU::lda8() |
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m_h = address >> 8; |
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m_h = address >> 8; |
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break; |
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break; |
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} |
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} |
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case 0xf2: // LD A,(C)
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m_wait_cycles += 8; |
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m_a = read(m_c); |
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break; |
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case 0xfa: // LD A,a16
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m_wait_cycles += 16; |
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m_a = pcRead16(); |
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break; |
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default: |
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default: |
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VERIFY_NOT_REACHED(); |
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VERIFY_NOT_REACHED(); |
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} |
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} |
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@ -430,6 +442,14 @@ void CPU::ldr8() |
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m_a = read(hl()); |
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m_a = read(hl()); |
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break; |
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break; |
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case 0x7f: /* LD A,A m_a = m_a; */ break; |
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case 0x7f: /* LD A,A m_a = m_a; */ break; |
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case 0xe2: // LD (C),A
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m_wait_cycles += 4; |
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write(m_c, m_a); |
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break; |
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case 0xea: // LD a16,A
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m_wait_cycles += 16; |
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write(pcRead16(), m_a); |
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break; |
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default: |
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default: |
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VERIFY_NOT_REACHED(); |
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VERIFY_NOT_REACHED(); |
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} |
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} |
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